Ukufunda kwi-semiconductor kufainkqubo yokudibanisa, kubandakanywa inkqubo yokudibanisa i-adhesive, inkqubo ye-eutectic bonding, inkqubo ye-solder ethambileyo ye-solder, inkqubo ye-sintering yesilivere, inkqubo yokudibanisa i-hot, inkqubo ye-flip chip bonding. Iindidi kunye nezibonakaliso ezibalulekileyo zezobugcisa zezixhobo ze-semiconductor die bonding zingeniswa, isimo sophuhliso sihlalutywa, kwaye uphuhliso lophuhliso lulindelwe.
1 Isishwankathelo soshishino lwesemiconductor kunye nokupakishwa
Ishishini le-semiconductor ngokukodwa libandakanya izixhobo kunye nezixhobo ze-semiconductor, ukuveliswa kwe-semiconductor ephakathi, kunye nezicelo ezisezantsi. Ishishini lelizwe lam le-semiconductor laqala emva kwexesha, kodwa emva kweminyaka ephantse ibe lishumi yophuhliso olukhawulezayo, ilizwe lam liye laba lelona shishini likhulu lehlabathi lokuthengisa imveliso yesemiconductor kunye neyona marike inkulu yehlabathi yezixhobo zesemiconductor. Ishishini le-semiconductor liye laphuhla ngokukhawuleza kwindlela yesizukulwana esinye sezixhobo, isizukulwana esinye senkqubo, kunye nesizukulwana esinye seemveliso. Uphando malunga nenkqubo ye-semiconductor kunye nezixhobo yeyona nto iphambili yokuqhuba inkqubela phambili eqhubekayo yoshishino kunye nesiqinisekiso soshishino kunye nokuveliswa kobuninzi beemveliso ze-semiconductor.
Imbali yophuhliso lwetekhnoloji yokupakishwa kwe-semiconductor yimbali yokuphuculwa okuqhubekayo kokusebenza kwe-chip kunye ne-miniaturization eqhubekayo yeenkqubo. Amandla okuqhuba angaphakathi kwitekhnoloji yokupakisha iye yavela kwintsimi yee-smartphones eziphezulu ukuya kwiinkalo ezifana ne-high-performance computing kunye nobukrelekrele bokwenziwa. Izigaba ezine zophuhliso lweteknoloji yokupakisha i-semiconductor iboniswe kwiThebhile 1.
Njengoko i-semiconductor lithography process nodes ihamba ukuya kwi-10 nm, 7 nm, 5 nm, 3 nm, kunye ne-2 nm, i-R & D kunye neendleko zemveliso ziqhubeka zinyuka, izinga lesivuno liyancipha, kwaye uMthetho kaMoore uyancipha. Ngokwembono yeendlela zophuhliso lwamashishini, okwangoku zinyanzelwa yimida yendalo yoxinaniso lwetransistor kunye nokunyuka okukhulu kweendleko zokwenziwa, ukupakishwa kuphuhla kwicala le-miniaturization, uxinaniso oluphezulu, ukusebenza okuphezulu, isantya esiphezulu, ukuphindaphindwa okuphezulu, kunye nokudityaniswa okuphezulu. Umzi-mveliso we-semiconductor ungene kwixesha le-post-Moore, kwaye iinkqubo eziqhubela phambili azisajoliswanga nje ekuqhubeleni phambili kweenodi zetekhnoloji yokuvelisa i-wafer, kodwa ngokuthe ngcembe ziguqukela kwitekhnoloji yokupakisha ephezulu. Ubuchwephesha bokupakisha obuphezulu abunakuphucula kuphela imisebenzi kunye nokwandisa ixabiso lemveliso, kodwa kunye nokunciphisa ngokufanelekileyo iindleko zokuvelisa, kube yindlela ebalulekileyo yokuqhubeka noMthetho kaMoore. Kwelinye icala, itekhnoloji yamasuntswana engundoqo isetyenziselwa ukwahlula iinkqubo ezintsonkothileyo zibe ziitekhnoloji ezininzi zokupakisha ezinokupakishwa kwipakethe engafaniyo neyohlukileyo. Ngakolunye uhlangothi, iteknoloji yenkqubo edibeneyo isetyenziselwa ukudibanisa izixhobo zezixhobo ezahlukeneyo kunye nezakhiwo, ezineenzuzo ezizodwa zokusebenza. Ukuhlanganiswa kwemisebenzi emininzi kunye nezixhobo zezixhobo ezahlukeneyo zifezekiswa ngokusebenzisa iteknoloji ye-microelectronics, kwaye uphuhliso oluvela kwiisekethe ezidibeneyo ukuya kwiinkqubo ezidibeneyo ziyafezekiswa.
Ukupakishwa kwe-Semiconductor yindawo yokuqala yokuveliswa kwe-chip kunye nebhulorho phakathi kwehlabathi langaphakathi le-chip kunye nenkqubo yangaphandle. Okwangoku, ukongeza kwiinkampani zesiqhelo zokupakishwa kwe-semiconductor kunye nokuvavanya, i-semiconductoriqhekezana lesonkaiziseko, iinkampani zoyilo lwesemiconductor, kunye neenkampani ezidityanisiweyo zecandelo ziphuhlisa ngokuqhubekayo ukupakishwa okuphambili okanye ubugcisa bokupakisha obuphambili obunxulumeneyo.
Iinkqubo eziphambili zeteknoloji yokupakisha yendabuko ziiqhekezana lesonkaukubhitya, ukusika, ukufa bonding, wire bonding, ukutywina iplastiki, electroplating, iimbambo ukusika kunye nokubumba, njl. Phakathi kwazo, inkqubo yokubophelela kufa yenye yezona nkqubo zintsonkothileyo nezibalulekileyo zokupakisha, kunye nezixhobo inkqubo die bonding yenye esona sixhobo sibalulekileyo kwipakethe ye-semiconductor, kwaye sesinye sezixhobo zokupakisha ezinexabiso eliphezulu lemarike. Nangona itekhnoloji yokupakisha ephezulu isebenzisa iinkqubo zangaphambili ezifana ne-lithography, i-etching, i-metallization, kunye ne-planarization, eyona nkqubo ibalulekileyo yokupakisha iseyinkqubo yokudibanisa ukufa.
2 Semiconductor die bonding inkqubo
2.1 Isishwankathelo
Inkqubo yokudibanisa ukufa ikwabizwa ngokuba yi-chip loading, i-core loading, i-die bonding, inkqubo ye-chip bonding, njl. Inkqubo ye-die bonding iboniswe kwi-Figure 1. Ngokuqhelekileyo, ukudibanisa ukufa kukuthatha i-chip kwi-wafer usebenzisa intloko ye-welding. umbhobho wokufunxa usebenzisa ivacuum, kwaye uyibeke kwindawo ekhethiweyo yephedi yesakhelo esikhokelayo okanye isubstrate yokupakisha phantsi kwesikhokelo esibonwayo, ukuze itshiphu kunye nephedi zibotshwe kwaye ilungisiwe. Umgangatho kunye nokusebenza kakuhle kwenkqubo yokudibanisa i-die kuya kuchaphazela ngokuthe ngqo umgangatho kunye nokusebenza kakuhle kwe-wire bonding elandelayo, ngoko ke ukudibanisa ukufa kungenye yezobuchwepheshe obuphambili kwinkqubo ye-back-end semiconductor.
Kwiinkqubo ezahlukeneyo zokupakishwa kwemveliso ye-semiconductor, okwangoku kukho iindlela ezintandathu eziphambili zetekhnoloji yenkqubo yokudibanisa ukufa, ezizezi, ukuncamathela okuncamathelayo, ukuncamathela kwe-eutectic, ukudityaniswa kwe-solder ethambileyo, isilivere ye-sintering bonding, i-hot pressing bonding, kunye ne-flip-chip bonding. Ukufezekisa i-chip bonding elungileyo, kuyimfuneko ukwenza izinto eziphambili zenkqubo kwinkqubo yokudibanisa i-die zisebenzisane, ngokukodwa kubandakanywa izinto ezidibeneyo zokufa, ubushushu, ixesha, uxinzelelo kunye nezinye izinto.
2. 2 Inkqubo yokudibanisa i-adhesive
Ngexesha lokuncamathela okuncamathelayo, umlinganiselo othile wokuncamathelisa kufuneka usetyenziswe kwisakhelo esikhokelayo okanye kwipakethe engaphantsi ngaphambi kokubeka itshiphu, emva koko intloko yokufa ithatha itshiphu, kwaye ngesikhokelo sombono womatshini, itshiphu ibekwe ngokuchanekileyo kwikhonkco. indawo yesakhelo esikhokelayo okanye isubstrate yephakheji eqatywe ngokuncamathelayo, kwaye amandla athile okudibanisa ukufa asetyenziswa kwitshiphu ngentloko yomatshini wokubopha, enze umaleko wokuncamathelisa phakathi kwetshiphu kunye. isakhelo esikhokelayo okanye i-substrate yephakheji, ukuze kufezekiswe injongo yokudibanisa, ukufaka kunye nokulungisa i-chip. Le nkqubo yokudibanisa ukufa ikwabizwa ngokuba yinkqubo yokudibanisa iglu kuba incamathelisa kufuneka ifakwe phambi komatshini wokudibanisa ukufa.
I-adhesives esetyenziswa ngokuqhelekileyo ibandakanya izinto ze-semiconductor ezifana ne-epoxy resin kunye ne-conductive silver paste. I-Adhesive bonding yeyona nkqubo isetyenziswa kakhulu kwi-semiconductor chip die bonding kuba inkqubo ilula noko, ixabiso liphantsi, kwaye kunokusetyenziswa izinto ezahlukeneyo.
2.3 Inkqubo yokudibanisa i-Eutectic
Ngexesha le-eutectic bonding, imathiriyeli ye-eutectic bonding idla ngokusetyenziswa ngaphambili ezantsi kwetshiphu okanye isakhelo esikhokelayo. Isixhobo se-eutectic bonding sithatha i-chip kwaye sikhokelwa yinkqubo yombono womatshini ukubeka ngokuchanekileyo i-chip kwindawo ehambelanayo yokubambisana kwesakhelo esikhokelayo. I-chip kunye nesakhelo esikhokelayo senza i-eutectic bonding interface phakathi kwe-chip kunye ne-substrate yephakheji phantsi kwesenzo esidibeneyo sokufudumeza kunye noxinzelelo. Inkqubo yokudibanisa i-eutectic isoloko isetyenziswa kwisakhelo sokukhokela kunye nokupakishwa kwe-ceramic substrate.
Izinto zokudibanisa i-Eutectic zixutywa ngokubanzi ngezinto ezimbini kwiqondo lokushisa elithile. Izinto ezisetyenziswa ngokuqhelekileyo ziquka igolide kunye ne-tin, igolide kunye ne-silicon, njl. Isitshixo ekuphunyezweni kwenkqubo ye-eutectic bonding kukuba i-eutectic bonding material inokunyibilika kwiqondo lokushisa elingaphantsi kwendawo yokunyibilika kwezinto ezimbini ezidibeneyo ukwenza ibhondi. Ukuze kuthintelwe isakhelo ukuba oxidized ngexesha inkqubo eutectic bonding, inkqubo eutectic bonding kwakhona kaninzi isebenzisa iigesi ezikhuselayo ezifana hydrogen kunye nitrogen igesi exutywe ukuba igalelo kumzila ukukhusela isakhelo ekhokelayo.
2. 4 Inkqubo ethambileyo yokudibanisa i-solder
Xa i-solder ethambileyo idibanisa, ngaphambi kokubeka i-chip, indawo yokudibanisa kwisakhelo esikhokelayo ifakwe kwaye icinezelwe, okanye ifakwe kabini, kwaye isakhelo esikhokelayo kufuneka sitshiswe kumzila. I-advanteji yenkqubo yokudibanisa i-solder ethambileyo yi-conductivity efanelekileyo ye-thermal, kwaye i-advantage kukuba i-oxidize ilula kwaye inkqubo inzima kakhulu. Ilungele ukupakishwa kwesakhelo esikhokelayo sezixhobo zamandla, ezinje nge-transistor outline package.
2. 5 Inkqubo yeSilver sintering bonding
Eyona nkqubo ithembisayo yokudibanisa i-chip ye-semiconductor yangoku yesizukulwana sesithathu samandla kukusetyenziswa kweteknoloji ye-metal particle sintering, edibanisa iipolymers ezifana ne-epoxy resin ejongene nokudibanisa kwi-glue conductive. Ine-conductivity egqwesileyo yombane, i-thermal conductivity, kunye neempawu zenkonzo yobushushu obuphezulu. Ikwayitekhnoloji ephambili yokuqhubela phambili kwipakethe ye-semiconductor yesizukulwana sesithathu kwiminyaka yakutshanje.
2.6 Inkqubo yokudibanisa i-Thermocompression
Kwipakethe yesicelo sokusebenza okuphezulu kweesekethe ezidityanisiweyo ezinamacala amathathu, ngenxa yokucuthwa okuqhubekayo kwe-chip interconnect input/output pitch, i-bump size kunye ne-pitch, inkampani ye-semiconductor i-Intel iye yasungula inkqubo yokudibanisa i-thermocompression kwizicelo ezincinci ze-pitch bonding, i-bonding encinci. iqhuma chips ngepitch ye-40 ukuba 50 μm okanye nokuba 10 μm. Inkqubo yokudibanisa i-Thermocompression ifanelekile kwi-chip-to-wafer kunye ne-chip-to-substrate izicelo. Njengenkqubo ekhawulezayo yamanyathelo amaninzi, inkqubo yokudibanisa i-thermocompression ijongene nemingeni kwimicimbi yokulawula inkqubo, njengokushisa okungalinganiyo kunye nokunyibilika okungalawulekiyo kwe-solder encinci. Ngexesha lokudibanisa i-thermocompression, ubushushu, uxinzelelo, indawo, njl. Kufuneka ihlangabezane neemfuno zokulawula ezichanekileyo.
2.7 Inkqubo yokudibanisa itshiphu
Umgaqo wenkqubo ye-flip chip bonding ubonisiwe kuMfanekiso 2. I-flip mechanism ithatha itshiphu kwi-wafer kwaye iyijikelezise i-180 ° ukuhambisa itshiphu. Umbhobho wentloko we-solder uchola itshiphu ukusuka kumatshini we-flip, kwaye icala lendawo yetshiphu lijonge ezantsi. Emva kokuba i-nozzle yentloko ye-welding ihambela phezulu kwi-substrate yokupakisha, ihambela ezantsi ukuya kwibhondi kwaye ilungise i-chip kwi-substrate yokupakisha.
I-Flip chip packaging yitekhnoloji yonxibelelwano lwetshiphu ephuhlileyo kwaye iye yaba lelona khokelo lophuhliso lobuchwephesha bokupakisha obuphambili. Ineempawu zokuxinana okuphezulu, ukusebenza okuphezulu, okuncinci kunye nokufutshane, kwaye inokuhlangabezana neemfuno zophuhliso lweemveliso zombane zabathengi ezifana nee-smartphones kunye neetafile. Inkqubo ye-flip chip bonding yenza ixabiso lokupakisha lisezantsi kwaye linokuqonda iitshiphusi ezipakishweyo kunye nokupakishwa okumacala amathathu. Isetyenziswa ngokubanzi kwiinkalo zobuchwepheshe bokupakisha ezifana ne-2.5D / 3D ukupakishwa okudibeneyo, ukupakishwa kwe-wafer-level, kunye ne-system-level packaging. Inkqubo ye-flip chip bonding yeyona nkqubo isetyenziswa kakhulu kwaye isetyenziswa kakhulu inkqubo yokudibanisa i-die bonding kubuchwepheshe bokupakisha obuphambili.
Ixesha lokuposa: Nov-18-2024