Ubuchwephesha bangoku bokupakishwa kwe-semiconductor buphucula ngokuthe ngcembe, kodwa ubungakanani bezixhobo ezizenzekelayo kunye nobuchwepheshe bamkelwe kwi-package ye-semiconductor ngokuthe ngqo kuqinisekisa ukufezekiswa kweziphumo ezilindelekileyo. Iinkqubo ezikhoyo zokupakishwa kwe-semiconductor zisagula ngenxa yeziphene, kwaye amagcisa amashishini awakasebenzisi ngokupheleleyo iinkqubo zokupakisha ezizenzekelayo. Ngenxa yoko, iinkqubo zokupakishwa kwe-semiconductor ezingenayo inkxaso evela kubuchwepheshe bolawulo oluzenzekelayo ziya kuba neendleko eziphezulu zomsebenzi kunye nexesha, okwenza kube nzima kumagcisa ukulawula ngokungqongqo umgangatho wokupakishwa kwe-semiconductor.
Enye yeendawo eziphambili zokuhlalutya yimpembelelo yeenkqubo zokupakisha ekuthembekeni kweemveliso eziphantsi-k. Ingqibelelo yegolide-aluminiyam bonding wire interface ichatshazelwa yizinto ezifana nexesha kunye nobushushu, okubangela ukuthembeka kwayo kuhla ngokuhamba kwexesha kwaye kubangele utshintsho kwisigaba sayo sekhemikhali, esinokukhokelela kwi-delamination kwinkqubo. Ngoko ke, kubalulekile ukunikela ingqalelo kulawulo lomgangatho kuwo onke amanqanaba enkqubo. Ukuseka amaqela akhethekileyo kumsebenzi ngamnye kunokunceda ukulawula le miba ngononophelo. Ukuqonda izizathu zeengxaki eziqhelekileyo kunye nokuphuhlisa izisombululo ezijoliswe kuzo, ezithembekileyo zibalulekile ekugcineni umgangatho wenkqubo jikelele. Ngokukodwa, iimeko zokuqala zeengcingo zokudibanisa, kubandakanywa iipads ezidibeneyo kunye nezinto eziphantsi kunye nezakhiwo, kufuneka zihlalutywe ngokucophelela. I-pad ye-bonding surface kufuneka igcinwe icocekile, kwaye ukukhethwa kunye nokusetyenziswa kwezixhobo zocingo ezidibeneyo, izixhobo zokudibanisa, kunye neeparitha zokudibanisa kufuneka zihlangabezane neemfuno zenkqubo ukuya kwinqanaba eliphezulu. Kunconywa ukudibanisa iteknoloji yenkqubo yobhedu kunye ne-fine-pitch bonding ukuqinisekisa ukuba impembelelo yegolide-aluminiyam ye-IMC kwi-package ukuthembeka igxininiswe kakhulu. Kwiingcingo zokudibanisa ezicolekileyo, nayiphi na i-deformation inokuchaphazela ubungakanani beebhola zebhondi kwaye ithintele indawo ye-IMC. Ngoko ke, ukulawulwa komgangatho ongqongqo ngexesha lesigaba esisebenzayo kuyimfuneko, kunye namaqela kunye nabasebenzi baphonononga ngokucokisekileyo imisebenzi yabo ethile kunye noxanduva lwabo, ngokulandela iimfuno zenkqubo kunye nemimiselo yokusombulula imiba emininzi.
Ukuphunyezwa ngokubanzi kokupakishwa kwe-semiconductor kunomsebenzi wobugcisa. Amagcisa amashishini kufuneka alandele ngokungqongqo amanyathelo okusebenza epakethe ye-semiconductor ukuphatha amacandelo ngokufanelekileyo. Nangona kunjalo, abanye abasebenzi beshishini abasebenzisi ubuchule obusemgangathweni ukugqibezela inkqubo yokupakishwa kwe-semiconductor kwaye bade bangakhathaleli ukuqinisekisa iinkcukacha kunye neemodeli zamacandelo e-semiconductor. Ngenxa yoko, amanye amacandelo e-semiconductor apakishwe ngendlela engachanekanga, ethintela i-semiconductor ekwenzeni imisebenzi yayo esisiseko kunye nokuchaphazela inzuzo yezoqoqosho yeshishini.
Ngokubanzi, inqanaba lobugcisa lokupakishwa kwe-semiconductor kusafuneka liphuculwe ngokucwangcisiweyo. Amagcisa kumashishini okuvelisa i-semiconductor kufuneka asebenzise ngokufanelekileyo iinkqubo zokupakisha ezizisebenzelayo ukuqinisekisa ukudityaniswa okuchanekileyo kwawo onke amacandelo e-semiconductor. Abahloli bomgangatho kufuneka baqhube uphononongo olubanzi nolungqongqo ukuchonga ngokuchanekileyo izixhobo ezipakishwe ngokungachanekanga ze-semiconductor kwaye babongoze ngokukhawuleza amagcisa ukuba enze izilungiso ezisebenzayo.
Ngapha koko, kumxholo wolawulo lwenkqubo yokudibanisa iingcingo, ukusebenzisana phakathi komgangatho wesinyithi kunye nomgangatho we-ILD kwindawo yokubopha ucingo kunokukhokelela kwi-delamination, ngakumbi xa i-pad yokubopha ucingo kunye nentsimbi engaphantsi / i-IDD iguquguquka ibe yimilo yekomityi. . Oku kubangelwa ikakhulu kuxinzelelo kunye namandla e-ultrasonic asetyenziswa ngumatshini wokudibanisa ucingo, onciphisa ngokuthe ngcembe amandla e-ultrasonic kwaye ayithumele kwindawo yokudibanisa i-wire, ukuthintela ukusabalalisa okufanayo kwegolide kunye ne-athomu ye-aluminium. Kwinqanaba lokuqala, uvandlakanyo lwe-low-k chip bonding lubonisa ukuba iiparamitha zenkqubo yokudibanisa zinovakalelo kakhulu. Ukuba iiparitha zokudibanisa zibekwe phantsi kakhulu, imiba efana nokuqhawula ucingo kunye neebhondi ezibuthathaka zingavela. Ukwandisa amandla e-ultrasonic ukubuyisela oku kunokubangela ukulahlekelwa kwamandla kunye nokwandisa i-deformation efana nekomityi. Ukongezelela, ukunamathela obuthathaka phakathi kwe-ILD kunye ne-metal layer, kunye nokunyanzeliswa kwezinto eziphantsi kwe-k, zizathu eziphambili zokuchithwa kwe-metal layer kwi-ILD layer. Ezi zinto ziphakathi kwemingeni ephambili kwinkqubo yokupakisha ye-semiconductor yangoku yolawulo lomgangatho kunye nokutsha.
Ixesha lokuposa: May-22-2024